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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
April 2009
FAN6791 / FAN6793 Highly Integrated, Dual-PWM Combination Controller
Features
High-Voltage Startup Low Operating Current Interleaved Stand-by PWM / Forward PWM Switching Green Mode Stand-by PWM / Forward PWM Linearly Decreasing Stand-by PWM Frequency to 20kHz Remote On / Off AC Brownout Protection Forward PWM with Soft-Start Frequency Hopping to Reduce EMI Emissions Cycle-by-Cycle Current Limiting for Stand-by PWM / Forward PWM Leading-Edge Blanking for Stand-by PWM / Forward PWM Synchronized Slope Compensation for Stand-by PWM / Forward PWM GATE Output Maximum Voltage Clamp VDD Over-Voltage Protection (OVP) VDD Under-Voltage Lockout (UVLO) Internal Open-Loop Protection for Stand-by PWM / Forward PWM Constant Power Limit for Stand-by PWM / Forward PWM
Description
The highly integrated FAN6791/3 dual PWM combination controller provides several features to enhance the performance of converters. To minimize standby power consumption, a proprietary green-mode function provides off-time modulation to linearly decrease the switching frequency at light-load conditions. To avoid acoustic-noise problems, the minimum PWM frequency is set above 20KHz. This green-mode function enables the power supply to meet international power conservation requirements. With the internal high-voltage startup circuitry, the power loss due to bleeding resistors is also eliminated. To further reduce power consumption, FAN6791/3 is manufactured using the CMOS process, which allows an operating current of only 6mA. FAN6791/3 integrates a frequency-jittering function internally to reduce EMI emissions of a power supply with minimum line filters. The built-in synchronized slope compensation achieves stable peak-current-mode control. The proprietary internal line compensation ensures constant output power limit. FAN6791/3 provides many protection functions, including brownout protection, cycle-by-cycle current limiting, and an internal open-loop protection circuit to ensure safety should an open-loop or output shortcircuit failure occur. PWM output is disabled until VDD drops below the UVLO lower limit when the controller restarts. As long as VDD exceeds ~24.5V, the internal OVP circuit is triggered.
Applications
General-purpose switch-mode power supplies and flyback power converters, including: PC-ATX Power Supplies
(c) 2008 Fairchild Semiconductor Corporation FAN6791 / FAN6793 * Rev. 1.0.2
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FAN6791 / FAN6793 --Highly Integrated, Dual-PWM Combination Controller
Ordering Information
Part Number
FAN6791NY FAN6793NY FAN6791MY FAN6793MY
OPWM Operating Maximum Duty Temperature Range
48% 65% 48% 65% -40C to +105C -40C to +105C -40C to +105C -40C to +105C
Eco Status
Green Green Green Green
Package
16-pin Dual In-Line Package (DIP) 16-pin Dual In-Line Package (DIP)) 16-pin Small Out-Line Package (SOP) 16-pin Small Out-Line Package (SOP)
Packing Method
Tube Tube Tape & Reel Tape & Reel
For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
Application Diagram
Figure 1. Typical Application
(c) 2008 Fairchild Semiconductor Corporation FAN6791 / FAN6793 * Rev. 1.0.2 www.fairchildsemi.com 2
FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Block Diagram
Pattern Generator
Figure 2. Function Block Diagram
(c) 2008 Fairchild Semiconductor Corporation FAN6791 / FAN6793 * Rev. 1.0.2
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Marking Information
F - Fairchild Logo Z - Plant Code X - 1-Digit Year Code Y - 1-Digit Week Code TT - 2-Digit Die Run Code T - Package Type (N:DIP, M:SOP) P - Y: Green Package M - Manufacture Flow Code
Figure 3. Top Mark
Pin Configuration
Figure 4. Pin Configuration (Top View)
(c) 2008 Fairchild Semiconductor Corporation FAN6791 / FAN6793 * Rev. 1.0.2
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Pin Definitions
Pin #
1 2 3
Name
HV NC GND
Description
For startup, this pin is pulled HIGH to the line input or bulk capacitor via resistors. No connection. Ground. Oscillator Setting. One resistor connected between RI and ground pins determines the switching frequency (resistance between 12 ~ 47k is recommended). The switching frequency is equal to [1560 / RI]kHz, where RI is in k. For example, if RI is equal to 24k, then the switching frequency is 65kHz. Voltage Feedback for Flyback PWM Stage. It is internally pulled HIGH through a 6.5k resistor. An external opto-coupler from secondary feedback circuit is usually connected to this pin. PWM Current Sense for Flyback PWM Stage. The sensed voltage is used for peak-currentmode control and cycle-by-cycle current limiting. Voltage Feedback for Forward PWM Stage. It is internally pulled HIGH through a 6.5k resistor. An external opto-coupler from secondary feedback circuit is usually connected to this pin. PWM Current Sense for Forward PWM Stage. Via a current sense resistor, this pin provides the control input for peak-current-mode control and cycle-by-cycle current limiting. Reference voltage. This pin can provide a reference voltage 5V. PWM Soft-Start. During startup, the SS pin charges an external capacitor with a 20A constant current source. The voltage on FBPWM is clamped by SS during startup. In the event of a protection condition occurring and/or forward PWM being disabled, the SS pin quickly discharges. PWM Remote ON/OFF. Active HIGH. The forward PWM is disabled whenever the voltage at this pin is lower than 0.8V or the pin is open. Ground. The power ground. Forward PWM Gate Drive. The totem-pole output drive for the forward PWM MOSFET. This pin is internally clamped under 16V to protect the MOSFET. Power Supply. The internal protection circuit disables PWM output as long as VDD exceeds the OVP trigger point. Flyback PWM Gate Drive. The totem-pole output drive for the forward PWM MOSFET. This pin is internally clamped under 16V to protect the MOSFET. Line-Voltage Detection. The pin is used for line compensation, for forward, and brownout protection.
4
RI
5 6 7 8 9 10 11 12 13 14 15 16
FBFYB IFYB FBPWM IPWM VREF SS ON/OFF PGND OPWM VDD OFYB VRMS
(c) 2008 Fairchild Semiconductor Corporation FAN6791 / FAN6793 * Rev. 1.0.2
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. All voltage values, except differential voltage, are given with respect to GND pin. Stresses beyond those listed under "absolute maximum ratings "may cause permanent damage to the device.
Symbol
VDD VHV VHIGH VLOW PD TJ TSTG R j-a TL DC Supply Voltage
Parameter
Input Voltage to HV Pin OPWM, OFYB, ON/OFF Others Power Dissipation (TA < 50C) Operating Junction Temperature Storage Temperature Range Thermal Resistance (Junction-to-Case) Lead Temperature (Wave Soldering, 10 Seconds) Human Body Model , JEDEC:JESD22-A114 (All Pins Except HV Pin) Charged Device Model , JEDEC:JESD22-C101 (All Pins Except HV Pin)
Min.
Max.
27 500
Unit
V V V V C/W C C C/W C
-0.3 -0.3 -40 -55
27.0 7.0 800 +125 +150 82.5 +260 3.5
ESD
kV 1.5
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
Parameter
Operating Ambient Temperature
Min.
-40
Max.
+105
Unit
C
(c) 2008 Fairchild Semiconductor Corporation FAN6791 / FAN6793 * Rev. 1.0.2
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Electrical Characteristics
VDD=18V; RI=24k;TA =25C, unless noted.
Symbol
VDD Section VDD-OP IDD ST IDD-OP1 IDD-OP2 VTH-ON VTH-OFF VTH-OLP ITH-OLP VDD-OVP tOVP HV ID IHV-CS VRI fOSC
Parameter
Continuously Operating Voltage Startup Current Operating Current 1 Operating Current 2 Start Threshold Voltage Minimum Operating Voltage IDD-OLP Off Voltage Internal Sink Current VDD Over-voltage Protection (Turn Off PWM with Delay) VDD Over-Voltage Protection Debounce
Conditions
Min.
Typ.
Max.
22
Units
V A mA mA V V V A V s
VDD - 0.16V VDD=15V, GATE Open VDD=15V, GATE Open, IREF=10mA 15 9 6.5 VTH-OLP +0.1V 70 23.4 VDD-OVP=26V 80
10 6 16 16 10 7.5 80 24.5 100
50 10 20 17 11 8.0 100 25.5 120
Maximum Input Current Internal Current Source RI Voltage Normal PWM Frequency Minimum Frequency in Green Mode RI Range RI Pin Open Protection RI Pin Short Protection
VAC=90V(VDC=120V), VDD=10F HV=500V,VDD=15V
1.5
2.5 10
3.5 50 1.224 68 4.7 22 47
mA A V kHz
Oscillator and Green-Mode Operation 1.176 Center Frequency, RI=24k Jitter Range fOSC-G-MIN RI RIOPEN RISHORT RI=24k 62 3.7 18 12 If RI > RIOPEN, PWM Turned Off If RI > RISHORT, PWM Turned Off 1 6 1.200 65 4.2 20 24
kHz k M k
VRMS for AC Brownout Protection VRMS-OFF VRMS-ON tRMS VREF VREF VREF1 VREF2 IREF_MAX IOS Reference Voltage Load Regulation of Reference Voltage Line Regulation of Reference Voltage Maximum Current Output Short Circuit
7
Off Threshold Voltage for AC Brownout Protection Start Threshold Voltage for AC Brownout Protection AC Brownout Protection Debounce Time RI=24k
0.75
0.80
0.85 VRMS-UVP-1 +0.21 240
V V ms
VRMS-UVP-1 VRMS-UVP-1 +0.17 +0.19 150 195
IREF=1mA, CREF=0.1F CREF=0.1F, IREF=1mA to 10mA CREF=0.1F, VDD=12V to 22V
4.75
5.00
5.25 80 25
V mV mV mA mA
10 15 20
15 25
(c) 2008 Fairchild Semiconductor Corporation FAN6791 / FAN6793 * Rev. 1.0.2
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Electrical Characteristics
VDD=18V; RI=24k;TA =25C, unless noted.
Symbol
ON/OFF RON/OFF VON VOFF
Parameter
Impedance ON/OFF Pin High Threshold Level of Synchronizing Signal Low Threshold Level of Synchronizing Signal Protection Junction (1) Temperature Restart Junction Temperature
(2)
Conditions
Min.
50 2.4 0.8
Typ.
Max.
100
Units
k V V
3.0 1.0
3.6 1.2
Over Temperature Protection (OTP) TOff TRestart 130 100 140 110 +150 +120 C C
Flyback PWM Stage FBFYB Feedback Input AV-FLY ZFB VHGH VFB-OLP tOLP VN SG VG VOZ-OFYB FB Input to Current Comparator Attenuation Input Impedance Output High Voltage FB Open-Loop Trigger Level FB Open-Loop Protection Delay Green Mode Entry FB Voltage Slope of Green-Mode Modulation Green Mode Ending FB Voltage VFBPWM for Zero Duty Cycle (Forward Turn On) Input Impedance Peak Current Limit Threshold Voltage 1 Peak Current Limit Threshold Voltage 2 Propagation Delay to GATE Output Leading-Edge Blanking Time Slope Compensation Threshold Voltage for SENSE Short-Circuit Protection Delay Time for SENSE ShortCircuit Protection Flyback PWM Gate Output Clamping Voltage Output Voltage Low Output Voltage High Rising Time Falling Time VSENSE<0.15V, RI=24K Duty=DCYMAX VRMS=1V VRMS=1.5V VDD=15V, OFYB Drops to 9V 60 200 0.34 0.1 100 270 0.37 0.15 180 0.75 FB Pin Open 1/3.75 4 5.0 4.2 53 2.4 60 1.8 1.2 1/3.20 5 5.2 4.5 56 2.5 75 1.9 1.3 4.8 59 2.6 90 2.0 1.4 1/2.75 7 V/V k V V ms V Hz/mV V V
IFYB Current Sense ZCS VLIMIT1 VLIMIT2 tPD tBNK VSLOPE VS-SCP tD-SSCP 12 0.80 VLIMIT1 -0.1 120 350 0.41 0.2 240 0.85 k V V ns ns V V s
OFYB-GATE Driver VOFYB-CLAMP VOL-OFYB VOH-OFYB tR-OFYB tF-OFYB VDD=22V VDD=15V; IO=20mA VDD=12V; IO=20mA VDD=15V; Gate=1nF; Gate=2~9V VDD=15V; Gate=1nF; Gate=9~2V 8 30 30 60 60 50 65 120 90 70 16 18 1.5 V V V ns ns %
DCYMAX-OFYB Maximum Duty Cycle
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Electrical Characteristics
VDD=18V; RI=24k;TA =25C, unless noted.
Symbol
Forward PWM Stage
Parameter
Conditions
Min.
Typ.
Max.
Units
FBPWM-Feedback Input AV ZFB VHGH VOPEN-PWM tOPEN-PWMHICCUP
FB to Current Comparator Attenuation Input Impedance Output High Voltage PWM Open-Loop Protection Voltage Interval of PWM Open-Loop Protection Reset PWM Open-Loop Protection Delay Time VFBPWM for Zero Duty Cycle Propagation Delay to Output - VLIMIT Loop Peak Current Limit Threshold Voltage 1 Peak Current Limit Threshold Voltage 2 Leading-Edge Blanking Time Slope Compensation Vs=VSLOPE x (ton/t) Vs: Compensation Voltage Added to Current Sense Output Voltage Maximum (Clamp) Output Voltage Low Output Voltage High Rising Time Falling Time FAN6791 Maximum Duty Cycle FAN6793 Maximum Duty Cycle Constant Current Output for Soft-Start Discharge Resistance VDD=15V, OPWM Drops to 9V VRMS=1V VRMS=1.5V RI=24k RI=24k FB Pin Open
1/3.2 4 5.0 4.2 500 80 1.2
1/2.7 5 5.2 4.5 600 95 1.3
1/2.2 7
V/V k V
4.8 700 120 1.4
V ms ms V
tOPEN-PWM VOZ-OPWM
IPWM-Current Sense tPD VLIMIT1 VLIMIT2 tBNK VSLOPE 60 0.75 0.80 VLIMIT1-0.1 270 0.40 350 0.45 450 0.55 120 0.85 ns V V ns V
OPWM-GATE Driver VOPWM-CLAMP VOL VOH tR tF DCYMAX-OPWM Soft Start ISS RD RI=24k 17 20 470 23 564 A VDD=22V VDD=15V; IO=100mA VDD=13V; IO=100mA VDD=15V; CL=5nF; O/P=2V to 9V VDD=15V; CL=5nF; O/P=9V to 2V RI=24k 8 30 30 47 60 60 50 48 65 120 110 49 70 16 18 1.5 V V V ns ns %
Notes: 1. When activated, the output is disabled and the latch is turned off. 2. This is the threshold temperature for enabling the output again and resetting the latch after over-temperature protection has been activated.
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Typical Characteristics
10.0 9.0 8.0 7.0
10.0 9.0 8.0 7.0 IDDOP1(uA) 6.0 5.0 4.0 3.0 2.0 1.0 0.0
5 20 35 50 65 80 95 110 125
IDDST(uA)
6.0 5.0 4.0 3.0 2.0 1.0 0.0 -40 -25 -10
-40 -25 -10
5
20
35 50
65
80
95 110 125
Figure 5. Startup Current IDD-ST vs. Temperature
20.0 19.0 18.0 17.0 IDDOP2(uA) IDMAX(uA) 16.0 15.0 14.0 13.0 12.0 11.0 10.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 0.0 0.5 1.5 2.0 2.5
Figure 6. IDD-OP1 vs. Temperature
1.0
-40 -25 -10
5
20
35
50
65
80
95 110 125
Figure 7. IDD-OP2 vs. Temperature
16.2 16.1 16.0 VDDOFF(V) VDDON(V) 15.9 15.8 15.7 15.6 15.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 10.2 10.1 10.0 9.9 9.8 9.7 9.6 9.5 9.4 9.3 9.2
Figure 8. ID-MAX vs. Temperature
-40 -25 -10
5
20
35 50
65
80
95 110 125
Figure 9. VDD-ON vs. Temperature
47.50 47.45 OPWM Max Duty(%) OFYB Max Duty(%) 47.40 47.35 47.30 47.25 47.20 47.15 47.10 -40 -25 -10 5 20 35 50 65 80 95 110 125 64.4 64.3 64.2 64.1 64.0 63.9 63.8 63.7 63.6 63.5 63.4 63.3
Figure 10. VDD-OFF vs. Temperature
-40 -25 -10
5
20
35 50
65
80
95 110 125
Figure 11. OPWM Maximum Duty Cycle vs. Temperature
Figure 12. OFYB Maximum Duty Cycle vs. Temperature
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Typical Characteristics
32.10 32.05 32.00 TR OPWM(ns) 31.95 31.90 31.85 31.80 31.75 31.70 -40 -25 -10 5 20 35 50 65 80 95 110 125 TF OPWM(ns) 57.5 57.0 56.5 56.0 55.5 55.0 54.5 54.0 53.5 -40 -25 -10 5 20 35 50 65 80 95 110 125
Figure 13. Rising Time tR-OPWM vs. Temperature
27.4 27.2 27.0 TR OFYB(ns) 26.8 26.6 26.4 26.2 26.0 25.8 -40 -25 -10 5 20 35 50 65 80 95 110 125
Figure 14. Falling Time tF-OPWM vs. Temperature
39 38 37 TF OFYB(ns) 36 35 34 33 32 31 30 -40 -25 -10 5 20 35 50 65 80 95 110 125
Figure 15. Rising Time tR-OFYB vs. Temperature
0.802 0.800
Figure 16. Falling Time tF-OFYB vs. Temperature
0.667 0.666 IPWM Vlimit(V) Vrms=1.5V 0.665 0.664 0.663 0.662 0.661 0.660 0.659
IPWM Vlimit(V) Vrms=1V
0.798 0.796 0.794 0.792 0.790 0.788 -40 -25 -10 5 20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
Figure 17. IPWM-VLIMIT (VRMS=1V) vs. Temperature
0.815 0.810 0.805 0.800 0.795 0.790 0.785 0.780 -40 -25 -10 5 20 35 50 65 80 95 110 125
Figure 18. IPWM-VLIMIT (VRMS=1.5V) vs. Temperature
0.653 0.652 IFYB Vlimit(V) Vrms=1.5V 0.651 0.650 0.649 0.648 0.647 0.646 0.645 0.644 0.643 -40 -25 -10 5 20 35 50 65 80 95 110 125
IFYB Vlimit(V) Vrms=1V
Figure 19. IFYB-VLIMIT (VRMS=1V) vs. Temperature
Figure 20. IFYB-VLIMIT (VRMS=1.5V)vs. Temperature
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Typical Characteristics
66.1 66.0 OPWM Freqency(Hz) 65.9 65.8 65.7 65.6 65.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 OFYB Frequncy(Hz 66.3 66.2 66.1 66.0 65.9 65.8 65.7 65.6 -40 -25 -10 5 20 35 50 65 80 95 110 125
Figure 21. OPWM Frequency vs. Temperature
Figure 22. OFYB Frequency vs. Temperature
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Functional Description
The highly integrated FAN6791 / FAN6793 dual-PWM combination controller provides several features to enhance the performance of converters. Proprietary interleave switching synchronizes the flyback and forward PWM stages. This reduces switching noise. The proprietary frequency jittering function for the flyback and forward PWM stages helps reduce switching EMI emissions. For the flyback and forward PWM, the synchronized slope compensation ensures the stability of the current loop under continuous-mode operation. In addition, FAN6791/3 provides complete protection functions, such as brownout protection and RI open/short. Figure 23. Oscillation Frequency in Green Mode
Line Voltage Detection (VRMS)
Figure 24 shows a resistive divider with low-pass filtering for line-voltage detection on VRMS pin. The VRMS voltage is used for the PFC multiplier and brownout protection. For brownout protection, when the VRMS voltage drops below 0.8V, OPFC turns off.
Startup Current
For startup, the HV pin is connected to the line input or bulk capacitor through external resistor RHV, recommended as 100K. Typical startup current drawn from pin HV is 2mA and it charges the hold-up capacitor through the resistor RHV. When the VDD capacitor level reaches VDD-ON, the startup current switches off. At this moment, the VDD capacitor only supplies the FAN6791/3 to maintain the VDD before the auxiliary winding of the main transformer provides the operating current.
Oscillator Operation
A resistor connected from the RI pin to the GND pin generates a constant current source for the FAN6791/3 controller. This current is used to determine the center PWM frequency. Increasing the resistance reduces PWM frequency. Using a 24K resistor results in a corresponding 65kHz PWM frequency. The switching frequency is programmed by the resistor RI connected between RI pin and GND. The relationship is:
fPWM = 1560 (kHz ) R I (k)
Figure 24. Line-Voltage Detection on VRMS Pin
Remote On/Off
Figure 25 shows the remote on / off function. When the supervisor FPO pin pulls down and enables the system by connecting an opto-coupler, VREF applies to the ON/OFF pin to enable forward PWM stage.
(1)
The range of the PWM oscillation frequency is designed as 33KHz ~ 130KHz. FAN6791/3 integrates frequency hopping function internally. The frequency variation ranges from around 61KHz to 69KHz for a center frequency 65KHz. The frequency hopping function helps reduce EMI emission of a power supply with minimum line filters. For power saving, flyback PWM stage has a green mode function. Frequency linearly decreases when VFB is within VG and VN. Once VFB is lower than VG, switching frequency disables, and it enters burst mode. Figure 25. Remote On/Off
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Interleave Switching
The FAN6791/3 uses interleaved switching to synchronize the stand-by PWM / forward PWM stages. This reduces switching noise and spreads the EMI emissions. Figure 26 shows that an off-time tOFF is inserted in between the turn-off of the stand-by gate drives and the turn-on of the forward PWM.
Constant Power Control
To limit the output power of the converter constantly, a power-limit function is included. Sensing the converter input voltage through the VRMS pin, the power limit function generates a relative peak-current-limit threshold voltage for constant power control, as shown in Figure 28.
Figure 26. Interleaved Switching
Slope Compensation
The stand-by PWM and forward PWM stage are designed for flyback and forward power converters. Peak-current-mode control is used to optimize system performance. Slope compensation is added to stabilize the current loop. The FAN6791/3 inserts a synchronized, positively sloped ramp at each switching cycle. The positively sloped ramp is represented by the voltage signal Vs-comp in Figure 27. Figure 28. Constant Power Control
Protections
The FAN6791/3 provides full protection functions to prevent the power supply and the load from being damaged. The protection features include: VDD Over-Voltage Protection. The stand-by PWM and forward PWM stages will be disabled whenever the VDD voltage exceeds the over-voltage threshold. AC Under-Voltage Protection. The VRMS pin is used to detect the AC input voltage. When voltage is lower than the brownout threshold, voltage disables both forward and stand-by PWM. RI Pin Open / Short Protection. The RI pin is used to set the switching frequency and internal current reference. The stand-by PWM and forward PWM stages are disabled whenever the RI pin is short or open. Open-Loop Protection. The stand-by PWM and forward PWM stages of FAN6791/3 is disabled whenever the FBFYB / FBPWM pin is open.
Figure 27. Slope Compensation
Gate Drivers
FAN6791/3 output stages are fast totem-pole gate drivers. The output driver is clamped by an internal 18V Zener diode to protect the power MOSFET.
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Reference Circuit
Figure 29. Reference Circuit
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
BOM List
Reference
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C20 C21 C22 C23 C24 C25 C28 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R13 R14 R15 R17
Component
C/0.47F/X2 C/0.47F/X2 C/471P/50V C/471P/50V C/102P/50V C/102P/50V C/102P/50V C/472/400V C/472/400V C/102P/50V C/10F/50V C/104P/50V C/102P/1KV C/470F/200V C/470F/200V C/103P/1KV C/1000F/10V C/330F/10V C/103P/50V R/680K 1/4W NC R/680K 1/4W R/51.1K 1/4W R/51.1K 1/4W R/2.4M 1/4W R/2.4M 1/4W R/24K 1/8W R/1K 1/8W R/19.1K 1/8W R/1K 1/8W R/100K 1/2W R/10 1/8W R/10 1/8W R/100 1/8W
Reference
R18 R20 R21 R22 R23 R24 R26 R29 R31 R35 R37 R38 Q1 Q2 Z3 Z2 Z1 D1 D2 D3 D4 BD1 U1 U2 U3 U6
Component
R/100 1/8W R/1/1W R/1 1/8W R/402 1/8W R/47K 3W R/10K 1/8W R/2K 1/8W R/470 1/8W R/0.1/2W R/N.A 1/4W R/20K 1% 1/8W R/20K 1% 1/8W 2N/60 9N90 7D271 7D271 7D561 D/1N4007 D/UF107 D/SB540 D/UF1007 D/6A/600V SG6791/3 PC-817 TL431 PC-817
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FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Physical Dimension
19.68 18.66
A
16
9
6.60 6.09
1
8
(0.40)
TOP VIEW
0.38 MIN 5.33 MAX 3.42 3.17 3.81 2.92 2.54 0.58 A 0.35 1.78 1.14 17.78
SIDE VIEW NOTES: UNLESS OTHERWISE SPECIFIED A THIS PACKAGE CONFORMS TO JEDEC MS-001 VARIATION BB B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR PROTRUSIONS D) CONFORMS TO ASME Y14.5M-1994 E) DRAWING FILE NAME: N16EREV1
Figure 30. 16-pin Dual In-Line Package (DIP)
8.13 7.62
0.35 0.20 8.69
15 0
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c) 2008 Fairchild Semiconductor Corporation FAN6791 / FAN6793 * Rev. 1.0.2
www.fairchildsemi.com 17
FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
Physical Dimensions (Continued)
Figure 31. 16-Pin Small Outline Package (SOIC)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c) 2008 Fairchild Semiconductor Corporation FAN6791 / FAN6793 * Rev. 1.0.2
www.fairchildsemi.com 18
FAN6791 / FAN6793 -- Highly Integrated, Dual-PWM Combination Controller
(c) 2008 Fairchild Semiconductor Corporation FAN6791 / FAN6793 * Rev. 1.0.2
www.fairchildsemi.com 19

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